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Macros | |
#define | SH3_ICR0 0xfffffee0 /* 16bit */ |
#define | SH3_IPRA 0xfffffee2 /* 16bit */ |
#define | SH3_IPRB 0xfffffee4 /* 16bit */ |
#define | SH7709_ICR1 0xa4000010 /* 16bit */ |
#define | SH7709_ICR2 0xa4000012 /* 16bit */ |
#define | SH7709_PINTER 0xa4000014 /* 16bit */ |
#define | SH7709_IPRC 0xa4000016 /* 16bit */ |
#define | SH7709_IPRD 0xa4000018 /* 16bit */ |
#define | SH7709_IPRE 0xa400001a /* 16bit */ |
#define | SH7709_IRR0 0xa4000004 /* 8bit */ |
#define | SH7709_IRR1 0xa4000006 /* 8bit */ |
#define | SH7709_IRR2 0xa4000008 /* 8bit */ |
#define | IPRC_IRQ3_MASK 0xf000 |
#define | IPRC_IRQ2_MASK 0x0f00 |
#define | IPRC_IRQ1_MASK 0x00f0 |
#define | IPRC_IRQ0_MASK 0x000f |
#define | IPRD_PINT07_MASK 0xf000 |
#define | IPRD_PINT8F_MASK 0x0f00 |
#define | IPRD_IRQ5_MASK 0x00f0 |
#define | IPRD_IRQ4_MASK 0x000f |
#define | IPRE_DMAC_MASK 0xf000 |
#define | IPRE_IRDA_MASK 0x0f00 |
#define | IPRE_SCIF_MASK 0x00f0 |
#define | IPRE_ADC_MASK 0x000f |
#define | IRR0_PINT8F 0x80 |
#define | IRR0_PINT07 0x40 |
#define | IRR0_IRQ5 0x20 |
#define | IRR0_IRQ4 0x10 |
#define | IRR0_IRQ3 0x08 |
#define | IRR0_IRQ2 0x04 |
#define | IRR0_IRQ1 0x02 |
#define | IRR0_IRQ0 0x01 |
#define | SH4_ICR 0xffd00000 /* 16bit */ |
#define | SH4_IPRA 0xffd00004 /* 16bit */ |
#define | SH4_IPRB 0xffd00008 /* 16bit */ |
#define | SH4_IPRC 0xffd0000c /* 16bit */ |
#define | SH4_IPRD 0xffd00010 /* 16bit */ |
#define | SH4_INTPRI00 0xfe080000 /* 32bit */ |
#define | SH4_INTREQ00 0xfe080020 /* 32bit */ |
#define | SH4_INTMSK00 0xfe080040 /* 32bit */ |
#define | SH4_INTMSKCLR00 0xfe080060 /* 32bit */ |
#define | IPRC_GPIO_MASK 0xf000 |
#define | IPRC_DMAC_MASK 0x0f00 |
#define | IPRC_SCIF_MASK 0x00f0 |
#define | IPRC_HUDI_MASK 0x000f |
#define | IPRD_IRL0_MASK 0xf000 |
#define | IPRD_IRL1_MASK 0x0f00 |
#define | IPRD_IRL2_MASK 0x00f0 |
#define | IPRD_IRL3_MASK 0x000f |
#define | IPRA_TMU0_MASK 0xf000 |
#define | IPRA_TMU1_MASK 0x0f00 |
#define | IPRA_TMU2_MASK 0x00f0 |
#define | IPRA_RTC_MASK 0x000f |
#define | IPRB_WDT_MASK 0xf000 |
#define | IPRB_REF_MASK 0x0f00 |
#define | IPRB_SCI_MASK 0x00f0 |
#define | INTPRI00_PCI0_MASK 0x0000000f |
#define | INTPRI00_PCI1_MASK 0x000000f0 |
#define | INTPRI00_TMU3_MASK 0x00000f00 |
#define | INTPRI00_TMU4_MASK 0x0000f000 |
#define | INTREQ00_PCISERR 0x00000001 |
#define | INTREQ00_PCIDMA3 0x00000002 |
#define | INTREQ00_PCIDMA2 0x00000004 |
#define | INTREQ00_PCIDMA1 0x00000008 |
#define | INTREQ00_PCIDMA0 0x00000010 |
#define | INTREQ00_PCIPWON 0x00000020 |
#define | INTREQ00_PCIPWDWN 0x00000040 |
#define | INTREQ00_PCIERR 0x00000080 |
#define | INTREQ00_TUNI3 0x00000100 |
#define | INTREQ00_TUNI4 0x00000200 |
#define | INTMSK00_MASK_ALL 0x000003ff |
#define INTMSK00_MASK_ALL 0x000003ff |
Definition at line 126 of file sh4_intcreg.h.
#define INTPRI00_PCI0_MASK 0x0000000f |
Definition at line 109 of file sh4_intcreg.h.
#define INTPRI00_PCI1_MASK 0x000000f0 |
Definition at line 110 of file sh4_intcreg.h.
#define INTPRI00_TMU3_MASK 0x00000f00 |
Definition at line 111 of file sh4_intcreg.h.
#define INTPRI00_TMU4_MASK 0x0000f000 |
Definition at line 112 of file sh4_intcreg.h.
#define INTREQ00_PCIDMA0 0x00000010 |
Definition at line 119 of file sh4_intcreg.h.
#define INTREQ00_PCIDMA1 0x00000008 |
Definition at line 118 of file sh4_intcreg.h.
#define INTREQ00_PCIDMA2 0x00000004 |
Definition at line 117 of file sh4_intcreg.h.
#define INTREQ00_PCIDMA3 0x00000002 |
Definition at line 116 of file sh4_intcreg.h.
#define INTREQ00_PCIERR 0x00000080 |
Definition at line 122 of file sh4_intcreg.h.
#define INTREQ00_PCIPWDWN 0x00000040 |
Definition at line 121 of file sh4_intcreg.h.
#define INTREQ00_PCIPWON 0x00000020 |
Definition at line 120 of file sh4_intcreg.h.
#define INTREQ00_PCISERR 0x00000001 |
Definition at line 115 of file sh4_intcreg.h.
#define INTREQ00_TUNI3 0x00000100 |
Definition at line 123 of file sh4_intcreg.h.
#define INTREQ00_TUNI4 0x00000200 |
Definition at line 124 of file sh4_intcreg.h.
#define IPRA_RTC_MASK 0x000f |
Definition at line 103 of file sh4_intcreg.h.
#define IPRA_TMU0_MASK 0xf000 |
Definition at line 100 of file sh4_intcreg.h.
#define IPRA_TMU1_MASK 0x0f00 |
Definition at line 101 of file sh4_intcreg.h.
#define IPRA_TMU2_MASK 0x00f0 |
Definition at line 102 of file sh4_intcreg.h.
#define IPRB_REF_MASK 0x0f00 |
Definition at line 106 of file sh4_intcreg.h.
#define IPRB_SCI_MASK 0x00f0 |
Definition at line 107 of file sh4_intcreg.h.
#define IPRB_WDT_MASK 0xf000 |
Definition at line 105 of file sh4_intcreg.h.
#define IPRC_DMAC_MASK 0x0f00 |
Definition at line 91 of file sh4_intcreg.h.
#define IPRC_GPIO_MASK 0xf000 |
Definition at line 90 of file sh4_intcreg.h.
#define IPRC_HUDI_MASK 0x000f |
Definition at line 93 of file sh4_intcreg.h.
#define IPRC_IRQ0_MASK 0x000f |
Definition at line 57 of file sh4_intcreg.h.
#define IPRC_IRQ1_MASK 0x00f0 |
Definition at line 56 of file sh4_intcreg.h.
#define IPRC_IRQ2_MASK 0x0f00 |
Definition at line 55 of file sh4_intcreg.h.
#define IPRC_IRQ3_MASK 0xf000 |
Definition at line 54 of file sh4_intcreg.h.
#define IPRC_SCIF_MASK 0x00f0 |
Definition at line 92 of file sh4_intcreg.h.
#define IPRD_IRL0_MASK 0xf000 |
Definition at line 95 of file sh4_intcreg.h.
#define IPRD_IRL1_MASK 0x0f00 |
Definition at line 96 of file sh4_intcreg.h.
#define IPRD_IRL2_MASK 0x00f0 |
Definition at line 97 of file sh4_intcreg.h.
#define IPRD_IRL3_MASK 0x000f |
Definition at line 98 of file sh4_intcreg.h.
#define IPRD_IRQ4_MASK 0x000f |
Definition at line 62 of file sh4_intcreg.h.
#define IPRD_IRQ5_MASK 0x00f0 |
Definition at line 61 of file sh4_intcreg.h.
#define IPRD_PINT07_MASK 0xf000 |
Definition at line 59 of file sh4_intcreg.h.
#define IPRD_PINT8F_MASK 0x0f00 |
Definition at line 60 of file sh4_intcreg.h.
#define IPRE_ADC_MASK 0x000f |
Definition at line 67 of file sh4_intcreg.h.
#define IPRE_DMAC_MASK 0xf000 |
Definition at line 64 of file sh4_intcreg.h.
#define IPRE_IRDA_MASK 0x0f00 |
Definition at line 65 of file sh4_intcreg.h.
#define IPRE_SCIF_MASK 0x00f0 |
Definition at line 66 of file sh4_intcreg.h.
#define IRR0_IRQ0 0x01 |
Definition at line 76 of file sh4_intcreg.h.
#define IRR0_IRQ1 0x02 |
Definition at line 75 of file sh4_intcreg.h.
#define IRR0_IRQ2 0x04 |
Definition at line 74 of file sh4_intcreg.h.
#define IRR0_IRQ3 0x08 |
Definition at line 73 of file sh4_intcreg.h.
#define IRR0_IRQ4 0x10 |
Definition at line 72 of file sh4_intcreg.h.
#define IRR0_IRQ5 0x20 |
Definition at line 71 of file sh4_intcreg.h.
#define IRR0_PINT07 0x40 |
Definition at line 70 of file sh4_intcreg.h.
#define IRR0_PINT8F 0x80 |
Definition at line 69 of file sh4_intcreg.h.
#define SH3_ICR0 0xfffffee0 /* 16bit */ |
Definition at line 39 of file sh4_intcreg.h.
#define SH3_IPRA 0xfffffee2 /* 16bit */ |
Definition at line 40 of file sh4_intcreg.h.
#define SH3_IPRB 0xfffffee4 /* 16bit */ |
Definition at line 41 of file sh4_intcreg.h.
#define SH4_ICR 0xffd00000 /* 16bit */ |
Definition at line 80 of file sh4_intcreg.h.
#define SH4_INTMSK00 0xfe080040 /* 32bit */ |
Definition at line 87 of file sh4_intcreg.h.
#define SH4_INTMSKCLR00 0xfe080060 /* 32bit */ |
Definition at line 88 of file sh4_intcreg.h.
#define SH4_INTPRI00 0xfe080000 /* 32bit */ |
Definition at line 85 of file sh4_intcreg.h.
#define SH4_INTREQ00 0xfe080020 /* 32bit */ |
Definition at line 86 of file sh4_intcreg.h.
#define SH4_IPRA 0xffd00004 /* 16bit */ |
Definition at line 81 of file sh4_intcreg.h.
#define SH4_IPRB 0xffd00008 /* 16bit */ |
Definition at line 82 of file sh4_intcreg.h.
#define SH4_IPRC 0xffd0000c /* 16bit */ |
Definition at line 83 of file sh4_intcreg.h.
#define SH4_IPRD 0xffd00010 /* 16bit */ |
Definition at line 84 of file sh4_intcreg.h.
#define SH7709_ICR1 0xa4000010 /* 16bit */ |
Definition at line 44 of file sh4_intcreg.h.
#define SH7709_ICR2 0xa4000012 /* 16bit */ |
Definition at line 45 of file sh4_intcreg.h.
#define SH7709_IPRC 0xa4000016 /* 16bit */ |
Definition at line 47 of file sh4_intcreg.h.
#define SH7709_IPRD 0xa4000018 /* 16bit */ |
Definition at line 48 of file sh4_intcreg.h.
#define SH7709_IPRE 0xa400001a /* 16bit */ |
Definition at line 49 of file sh4_intcreg.h.
#define SH7709_IRR0 0xa4000004 /* 8bit */ |
Definition at line 50 of file sh4_intcreg.h.
#define SH7709_IRR1 0xa4000006 /* 8bit */ |
Definition at line 51 of file sh4_intcreg.h.
#define SH7709_IRR2 0xa4000008 /* 8bit */ |
Definition at line 52 of file sh4_intcreg.h.
#define SH7709_PINTER 0xa4000014 /* 16bit */ |
Definition at line 46 of file sh4_intcreg.h.