dev_vr41xx.cc Source File
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57 #define DEV_VR41XX_TICKSHIFT 14
59 #define DEV_VR41XX_LENGTH 0x800
102 d->
sysint2 |= (1 << (line-16));
113 d->
sysint2 &= ~(1 << (line-16));
135 d->
giuint &= ~(1 << line);
214 if (d->
d0 != 0 || d->
d1 != 0 || d->
d2 != 0 ||
215 d->
d3 != 0 || d->
d4 != 0 || d->
d5 != 0)
239 case 'A': d->
d0 = 0x2000;
break;
240 case 'B': d->
d0 = 0x20;
break;
241 case 'C': d->
d0 = 0x1000;
break;
242 case 'D': d->
d0 = 0x10;
break;
243 default:
fatal(
"[ vr41xx kiu: unimpl"
244 "emented escape 0x%02 ]\n", ch);
248 case 'A': d->
d0 = 0x1000;
break;
249 case 'B': d->
d0 = 0x2000;
break;
250 case 'C': d->
d0 = 0x20;
break;
251 case 'D': d->
d0 = 0x10;
break;
252 default:
fatal(
"[ vr41xx kiu: unimpl"
253 "emented escape 0x%02 ]\n", ch);
260 d->
d5 = 0x800;
break;
262 d->
d5 = 0x800;
break;
264 d->
d5 = 0x800;
break;
266 d->
d5 = 0x800;
break;
268 d->
d5 = 0x800;
break;
270 d->
d5 = 0x800;
break;
272 d->
d5 = 0x800;
break;
274 d->
d5 = 0x800;
break;
276 d->
d5 = 0x800;
break;
278 d->
d5 = 0x800;
break;
281 d->
d5 = 0x800;
break;
283 d->
d5 = 0x800;
break;
285 d->
d5 = 0x800;
break;
287 d->
d5 = 0x800;
break;
289 d->
d5 = 0x800;
break;
291 d->
d5 = 0x800;
break;
293 d->
d5 = 0x800;
break;
295 d->
d5 = 0x800;
break;
297 d->
d5 = 0x800;
break;
299 d->
d5 = 0x800;
break;
301 case '1': d->
d3 = 0x80;
break;
302 case '2': d->
d3 = 0x40;
break;
303 case '3': d->
d3 = 0x20;
break;
304 case '4': d->
d3 = 0x10;
break;
305 case '5': d->
d2 = 0x08;
break;
306 case '6': d->
d2 = 0x04;
break;
307 case '7': d->
d2 = 0x02;
break;
308 case '8': d->
d2 = 0x01;
break;
309 case '9': d->
d2 = 0x8000;
break;
310 case '0': d->
d2 = 0x4000;
break;
312 case ';': d->
d0 = 0x800;
break;
313 case '\'': d->
d0 = 0x400;
break;
314 case '[': d->
d0 = 0x200;
break;
315 case '/': d->
d0 = 0x8;
break;
316 case '\\': d->
d0 = 0x4;
break;
317 case ']': d->
d0 = 0x2;
break;
319 case 'a': d->
d1 = 0x8000;
break;
320 case 'b': d->
d2 = 0x800;
break;
321 case 'c': d->
d1 = 0x20;
break;
322 case 'd': d->
d1 = 0x2000;
break;
323 case 'e': d->
d2 = 0x20;
break;
324 case 'f': d->
d1 = 0x1000;
break;
325 case 'g': d->
d3 = 0x8;
break;
326 case 'h': d->
d3 = 0x4;
break;
327 case 'i': d->
d3 = 0x100;
break;
328 case 'j': d->
d3 = 0x2;
break;
329 case 'k': d->
d3 = 0x1;
break;
330 case 'l': d->
d0 = 0x80;
break;
331 case 'm': d->
d2 = 0x200;
break;
332 case 'n': d->
d2 = 0x400;
break;
333 case 'o': d->
d0 = 0x8000;
break;
334 case 'p': d->
d4 = 0x20;
break;
335 case 'q': d->
d2 = 0x80;
break;
336 case 'r': d->
d2 = 0x10;
break;
337 case 's': d->
d1 = 0x4000;
break;
338 case 't': d->
d3 = 0x800;
break;
339 case 'u': d->
d3 = 0x200;
break;
340 case 'v': d->
d1 = 0x10;
break;
341 case 'w': d->
d2 = 0x40;
break;
342 case 'x': d->
d1 = 0x40;
break;
343 case 'y': d->
d3 = 0x400;
break;
344 case 'z': d->
d1 = 0x80;
break;
346 case ',': d->
d2 = 0x100;
break;
347 case '.': d->
d0 = 0x4000;
break;
348 case '-': d->
d1 = 0x400;
break;
349 case '=': d->
d1 = 0x200;
break;
352 case '\n': d->
d0 = 0x40;
break;
353 case ' ': d->
d0 = 0x01;
break;
354 case '\b': d->
d4 = 0x10;
break;
360 if (ch >=
'A' && ch <=
'Z') {
369 if (ch >= 1 && ch <= 26) {
385 recalc_kiu_int_assert(
cpu, d);
393 static void timer_tick(
struct timer *
timer,
void *extra)
408 vr41xx_keytick(
cpu, d);
418 static uint64_t vr41xx_kiu(
struct cpu *
cpu,
int ofs, uint64_t idata,
425 odata = d->
d0;
break;
427 odata = d->
d1;
break;
429 odata = d->
d2;
break;
431 odata = d->
d3;
break;
433 odata = d->
d4;
break;
435 odata = d->
d5;
break;
438 debug(
"[ vr41xx KIU: setting KIUSCANREP to 0x%04x ]\n",
442 fatal(
"[ vr41xx KIU: unimplemented read from "
447 debug(
"[ vr41xx KIU: write to KIUSCANS: 0x%04x: TODO"
451 debug(
"[ vr41xx KIU: unimplemented read from "
461 recalc_kiu_int_assert(
cpu, d);
468 debug(
"[ vr41xx KIU: unimplemented write to offset "
469 "0x%x, data=0x%016" PRIx64
" ]\n", ofs,
472 debug(
"[ vr41xx KIU: unimplemented read from offset "
483 uint64_t idata = 0, odata = 0;
490 regnr = relative_addr /
sizeof(uint64_t);
496 idata, writeflag, d);
502 switch (relative_addr) {
586 gettimeofday(&tv, NULL);
588 tv.tv_sec += (int64_t) (120*365 + 29) * 24*60*60;
590 switch (relative_addr) {
592 odata = (tv.tv_sec & 1) << 15;
593 odata += (uint64_t)tv.tv_usec * 32768 / 1000000;
596 odata = (tv.tv_sec >> 1) & 0xffff;
599 odata = (tv.tv_sec >> 17) & 0xffff;
606 if (writeflag ==
MEM_WRITE && idata != 0) {
608 debug(
"[ vr41xx: rtc interrupts at %i Hz ]\n", hz);
609 if (d->
timer == NULL)
640 debug(
"[ vr41xx: unimplemented write to address "
641 "0x%" PRIx64
", data=0x%016" PRIx64
" ]\n",
642 (uint64_t) relative_addr, (uint64_t) idata);
644 debug(
"[ vr41xx: unimplemented read from address "
645 "0x%" PRIx64
" ]\n", (uint64_t) relative_addr);
677 uint64_t baseaddr = 0;
685 snprintf(tmps,
sizeof(tmps),
"%s.cpu[%i].2",
692 for (i=0; i<=25; i++) {
694 snprintf(tmps,
sizeof(tmps),
"%s.cpu[%i].vrip.%i",
696 memset(&templ, 0,
sizeof(templ));
708 for (i=0; i<32; i++) {
710 snprintf(tmps,
sizeof(tmps),
"%s.cpu[%i].vrip.%i.giu.%i",
712 memset(&templ, 0,
sizeof(templ));
731 snprintf(tmps,
sizeof(tmps),
"%s.cpu[%i].vrip.%i",
734 snprintf(tmps,
sizeof(tmps),
"%s.cpu[%i].vrip.%i",
746 baseaddr = 0xb000000;
749 baseaddr = 0xa000000;
755 baseaddr = 0xf000000;
758 printf(
"Unimplemented VR cpu model\n");
763 snprintf(tmps,
sizeof(tmps),
"%s.cpu[%i].3",
766 snprintf(tmps,
sizeof(tmps),
"%s.cpu[%i].vrip.%i",
771 dev_vr41xx_access, (
void *)d,
DM_DEFAULT, NULL);
777 if (cpumodel == 4131) {
778 snprintf(tmps,
sizeof(tmps),
"ns16550 irq=%s.cpu[%i].vrip.%i "
781 (uint64_t) (baseaddr+0x800));
785 snprintf(tmps,
sizeof(tmps),
"ns16550 irq=%s.cpu[%i]."
792 snprintf(tmps,
sizeof(tmps),
"pcic irq=%s.cpu[%i].vrip.%i addr="
#define MACHINE_HPCMIPS_NEC_MOBILEPRO_770
#define BCUCLKSPEED_DIVT4
struct timer * timer_add(double freq, void(*timer_tick)(struct timer *timer, void *extra), void *extra)
void vr41xx_giu_interrupt_deassert(struct interrupt *interrupt)
#define INTERRUPT_CONNECT(name, istruct)
#define INTERRUPT_ASSERT(istruct)
void(* interrupt_deassert)(struct interrupt *)
#define BCUREVID_RID_4122
void console_makeavail(int handle, char ch)
#define BCUREVID_RID_4111
addr & if(addr >=0x24 &&page !=NULL)
void memory_device_register(struct memory *mem, const char *, uint64_t baseaddr, uint64_t len, int(*f)(struct cpu *, struct memory *, uint64_t, unsigned char *, size_t, int, void *), void *extra, int flags, unsigned char *dyntrans_data)
struct vr41xx_data * dev_vr41xx_init(struct machine *machine, struct memory *mem, int cpumodel)
int console_start_slave_inputonly(struct machine *machine, const char *consolename, int use_for_input)
#define DEV_VR41XX_TICKSHIFT
int console_charavail(int handle)
#define BCUREVID_RID_4181
void machine_add_tickfunction(struct machine *machine, void(*func)(struct cpu *, void *), void *extra, int clockshift)
void fatal(const char *fmt,...)
uint64_t memory_readmax64(struct cpu *cpu, unsigned char *buf, int len)
int pending_timer_interrupts
void * device_add(struct machine *machine, const char *name_and_params)
int console_readchar(int handle)
#define BCUREVID_RID_4121
#define DEV_VR41XX_LENGTH
#define BCUREVID_RID_4101
#define BCUREVID_RID_4131
struct interrupt timer_irq
#define BCU81CLKSPEED_REG_W
#define BCUREVID_RID_4102
void vr41xx_vrip_interrupt_assert(struct interrupt *interrupt)
void timer_update_frequency(struct timer *t, double new_freq)
#define INTERRUPT_DEASSERT(istruct)
void vr41xx_giu_interrupt_assert(struct interrupt *interrupt)
void(* interrupt_assert)(struct interrupt *)
void interrupt_handler_register(struct interrupt *templ)
void vr41xx_vrip_interrupt_deassert(struct interrupt *interrupt)
void memory_writemax64(struct cpu *cpu, unsigned char *buf, int len, uint64_t data)
#define BCUCLKSPEED_DIVTSHFT
void dev_ram_init(struct machine *machine, uint64_t baseaddr, uint64_t length, int mode, uint64_t otheraddress, const char *name)
#define CHECK_ALLOCATION(ptr)
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