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Classes | |
struct | arm_cpu_type_def |
struct | arm_cpu |
Macros | |
#define | ARM_SL 10 |
#define | ARM_FP 11 |
#define | ARM_IP 12 |
#define | ARM_SP 13 |
#define | ARM_LR 14 |
#define | ARM_PC 15 |
#define | N_ARM_REGS 16 |
#define | ARM_REG_NAMES |
#define | ARM_CONDITION_STRINGS |
#define | ARM_DPI_NAMES |
#define | ARM_THUMB_DPI_NAMES |
#define | ARM_IC_ENTRIES_SHIFT 10 |
#define | ARM_N_IC_ARGS 3 |
#define | ARM_INSTR_ALIGNMENT_SHIFT 2 |
#define | ARM_IC_ENTRIES_PER_PAGE (1 << ARM_IC_ENTRIES_SHIFT) |
#define | ARM_PC_TO_IC_ENTRY(a) |
#define | ARM_ADDR_TO_PAGENR(a) |
#define | ARM_F_N 8 /* Same as ARM_FLAG_*, but */ |
#define | ARM_F_Z 4 /* for the 'flags' field instead */ |
#define | ARM_F_C 2 /* of cpsr. */ |
#define | ARM_F_V 1 |
#define | ARM_FLAG_N 0x80000000 /* Negative flag */ |
#define | ARM_FLAG_Z 0x40000000 /* Zero flag */ |
#define | ARM_FLAG_C 0x20000000 /* Carry flag */ |
#define | ARM_FLAG_V 0x10000000 /* Overflow flag */ |
#define | ARM_FLAG_Q 0x08000000 /* DSP saturation overflow */ |
#define | ARM_FLAG_J 0x01000000 /* Java flag (BXJ instruction ARMv5J) */ |
#define | ARM_FLAG_E 0x00000200 /* Data Endianness (SETEND instruction ARMv6) */ |
#define | ARM_FLAG_A 0x00000100 /* A = 1 disables Imprecise Data Aborts (ARMv6) */ |
#define | ARM_FLAG_I 0x00000080 /* Interrupt disable */ |
#define | ARM_FLAG_F 0x00000040 /* Fast Interrupt disable */ |
#define | ARM_FLAG_T 0x00000020 /* Thumb mode */ |
#define | ARM_FLAG_MODE 0x0000001f |
#define | ARM_MODE_USR26 0x00 |
#define | ARM_MODE_FIQ26 0x01 |
#define | ARM_MODE_IRQ26 0x02 |
#define | ARM_MODE_SVC26 0x03 |
#define | ARM_MODE_USR32 0x10 |
#define | ARM_MODE_FIQ32 0x11 |
#define | ARM_MODE_IRQ32 0x12 |
#define | ARM_MODE_SVC32 0x13 |
#define | ARM_MODE_ABT32 0x17 |
#define | ARM_MODE_UND32 0x1b |
#define | ARM_MODE_SYS32 0x1f |
#define | ARM_EXCEPTION_TO_MODE |
#define | N_ARM_EXCEPTIONS 8 |
#define | ARM_EXCEPTION_RESET 0 |
#define | ARM_EXCEPTION_UND 1 |
#define | ARM_EXCEPTION_SWI 2 |
#define | ARM_EXCEPTION_PREF_ABT 3 |
#define | ARM_EXCEPTION_DATA_ABT 4 |
#define | ARM_EXCEPTION_IRQ 6 |
#define | ARM_EXCEPTION_FIQ 7 |
#define | ARM_MAX_VPH_TLB_ENTRIES 384 |
#define | ARM_CONTROL_MMU 0x0001 |
#define | ARM_CONTROL_ALIGN 0x0002 |
#define | ARM_CONTROL_CACHE 0x0004 |
#define | ARM_CONTROL_WBUFFER 0x0008 |
#define | ARM_CONTROL_PROG32 0x0010 |
#define | ARM_CONTROL_DATA32 0x0020 |
#define | ARM_CONTROL_BIG 0x0080 |
#define | ARM_CONTROL_S 0x0100 |
#define | ARM_CONTROL_R 0x0200 |
#define | ARM_CONTROL_F 0x0400 |
#define | ARM_CONTROL_Z 0x0800 |
#define | ARM_CONTROL_ICACHE 0x1000 |
#define | ARM_CONTROL_V 0x2000 |
#define | ARM_CONTROL_RR 0x4000 |
#define | ARM_CONTROL_L4 0x8000 |
#define | ARM_AUXCTRL_MD 0x30 /* MiniData Cache Attribute */ |
#define | ARM_AUXCTRL_MD_SHIFT 4 |
#define | ARM_AUXCTRL_P 0x02 /* Page Table Memory Attribute */ |
#define | ARM_AUXCTRL_K 0x01 /* Write Buffer Coalescing Disable */ |
#define | ARM_CACHETYPE_CLASS 0x1e000000 |
#define | ARM_CACHETYPE_CLASS_SHIFT 25 |
#define | ARM_CACHETYPE_HARVARD 0x01000000 |
#define | ARM_CACHETYPE_HARVARD_SHIFT 24 |
#define | ARM_CACHETYPE_DSIZE 0x001c0000 |
#define | ARM_CACHETYPE_DSIZE_SHIFT 18 |
#define | ARM_CACHETYPE_DASSOC 0x00038000 |
#define | ARM_CACHETYPE_DASSOC_SHIFT 15 |
#define | ARM_CACHETYPE_DLINE 0x00003000 |
#define | ARM_CACHETYPE_DLINE_SHIFT 12 |
#define | ARM_CACHETYPE_ISIZE 0x000001c0 |
#define | ARM_CACHETYPE_ISIZE_SHIFT 6 |
#define | ARM_CACHETYPE_IASSOC 0x00000038 |
#define | ARM_CACHETYPE_IASSOC_SHIFT 3 |
#define | ARM_CACHETYPE_ILINE 0x00000003 |
#define | ARM_CACHETYPE_ILINE_SHIFT 0 |
Functions | |
void | arm_setup_initial_translation_table (struct cpu *cpu, uint32_t ttb_addr) |
void | arm_translation_table_set_l1 (struct cpu *cpu, uint32_t vaddr, uint32_t paddr) |
void | arm_translation_table_set_l1_b (struct cpu *cpu, uint32_t vaddr, uint32_t paddr) |
void | arm_exception (struct cpu *, int) |
int | arm_cpu_interpret_thumb_SLOW (struct cpu *) |
int | arm_run_instr (struct cpu *cpu) |
void | arm_update_translation_table (struct cpu *cpu, uint64_t vaddr_page, unsigned char *host_page, int writeflag, uint64_t paddr_page) |
void | arm_invalidate_translation_caches (struct cpu *cpu, uint64_t, int) |
void | arm_invalidate_code_translation (struct cpu *cpu, uint64_t, int) |
void | arm_load_register_bank (struct cpu *cpu) |
void | arm_save_register_bank (struct cpu *cpu) |
int | arm_memory_rw (struct cpu *cpu, struct memory *mem, uint64_t vaddr, unsigned char *data, size_t len, int writeflag, int cache_flags) |
int | arm_cpu_family_init (struct cpu_family *) |
void | arm_coproc_15 (struct cpu *cpu, int opcode1, int opcode2, int l_bit, int crn, int crm, int rd) |
void | arm_coproc_i80321_6 (struct cpu *cpu, int opcode1, int opcode2, int l_bit, int crn, int crm, int rd) |
void | arm_coproc_xscale_14 (struct cpu *cpu, int opcode1, int opcode2, int l_bit, int crn, int crm, int rd) |
void | arm_push (struct cpu *cpu, uint32_t *np, int p_bit, int u_bit, int s_bit, int w_bit, uint16_t regs) |
void | arm_pop (struct cpu *cpu, uint32_t *np, int p_bit, int u_bit, int s_bit, int w_bit, uint32_t iw) |
int | arm_translate_v2p (struct cpu *cpu, uint64_t vaddr, uint64_t *return_addr, int flags) |
int | arm_translate_v2p_mmu (struct cpu *cpu, uint64_t vaddr, uint64_t *return_addr, int flags) |
#define ARM_ADDR_TO_PAGENR | ( | a | ) |
#define ARM_AUXCTRL_K 0x01 /* Write Buffer Coalescing Disable */ |
#define ARM_AUXCTRL_MD 0x30 /* MiniData Cache Attribute */ |
#define ARM_AUXCTRL_P 0x02 /* Page Table Memory Attribute */ |
#define ARM_CONDITION_STRINGS |
#define ARM_DPI_NAMES |
#define ARM_EXCEPTION_TO_MODE |
#define ARM_FLAG_A 0x00000100 /* A = 1 disables Imprecise Data Aborts (ARMv6) */ |
#define ARM_FLAG_E 0x00000200 /* Data Endianness (SETEND instruction ARMv6) */ |
#define ARM_FLAG_F 0x00000040 /* Fast Interrupt disable */ |
#define ARM_FLAG_J 0x01000000 /* Java flag (BXJ instruction ARMv5J) */ |
#define ARM_FLAG_Q 0x08000000 /* DSP saturation overflow */ |
#define ARM_IC_ENTRIES_PER_PAGE (1 << ARM_IC_ENTRIES_SHIFT) |
#define ARM_PC_TO_IC_ENTRY | ( | a | ) |
#define ARM_REG_NAMES |
#define ARM_THUMB_DPI_NAMES |
void arm_coproc_15 | ( | struct cpu * | cpu, |
int | opcode1, | ||
int | opcode2, | ||
int | l_bit, | ||
int | crn, | ||
int | crm, | ||
int | rd | ||
) |
Definition at line 50 of file cpu_arm_coproc.cc.
References cpu::arm, ARM_AUXCTRL_K, ARM_AUXCTRL_MD, ARM_AUXCTRL_MD_SHIFT, ARM_CONTROL_ALIGN, ARM_CONTROL_BIG, ARM_CONTROL_CACHE, ARM_CONTROL_ICACHE, ARM_CONTROL_MMU, ARM_CONTROL_WBUFFER, ARM_PC, arm_translate_v2p(), arm_translate_v2p_mmu(), arm_cpu::auxctrl, cpu::byte_order, arm_cpu::cachetype, cpu::cd, arm_cpu::control, arm_cpu::cpar, arm_cpu_type_def::cpu_id, arm_cpu::cpu_type, arm_cpu::dacr, debug, EMUL_BIG_ENDIAN, arm_cpu::far, fatal(), arm_cpu::fsr, INVALIDATE_ALL, cpu::invalidate_translation_caches, INVALIDATE_VADDR, arm_cpu::pid, arm_cpu::r, cpu::translate_v2p, and arm_cpu::ttb.
void arm_coproc_i80321_6 | ( | struct cpu * | cpu, |
int | opcode1, | ||
int | opcode2, | ||
int | l_bit, | ||
int | crn, | ||
int | crm, | ||
int | rd | ||
) |
Definition at line 292 of file cpu_arm_coproc.cc.
References cpu::arm, cpu::cd, fatal(), arm_cpu::i80321_inten, arm_cpu::i80321_isrc, arm_cpu::i80321_isteer, INTERRUPT_DEASSERT, arm_cpu::r, arm_cpu::tcr0, arm_cpu::tcr1, arm_cpu::tisr, TISR_TMR0, TISR_TMR1, arm_cpu::tmr0, arm_cpu::tmr0_irq, arm_cpu::tmr1, arm_cpu::tmr1_irq, arm_cpu::trr0, arm_cpu::trr1, and arm_cpu::wdtcr.
Referenced by MACHINE_SETUP().
void arm_coproc_xscale_14 | ( | struct cpu * | cpu, |
int | opcode1, | ||
int | opcode2, | ||
int | l_bit, | ||
int | crn, | ||
int | crm, | ||
int | rd | ||
) |
Definition at line 416 of file cpu_arm_coproc.cc.
References cpu::arm, cpu::cd, fatal(), arm_cpu::r, arm_cpu::xsc1_ccnt, arm_cpu::xsc1_pmn0, arm_cpu::xsc1_pmn1, arm_cpu::xsc1_pmnc, arm_cpu::xsc2_ccnt, arm_cpu::xsc2_evtsel, arm_cpu::xsc2_flag, arm_cpu::xsc2_inten, arm_cpu::xsc2_pmn0, arm_cpu::xsc2_pmn1, arm_cpu::xsc2_pmn2, arm_cpu::xsc2_pmn3, and arm_cpu::xsc2_pmnc.
int arm_cpu_family_init | ( | struct cpu_family * | ) |
int arm_cpu_interpret_thumb_SLOW | ( | struct cpu * | ) |
Definition at line 1097 of file cpu_arm.cc.
References addr, cpu::arm, arm_cpu_disassemble_instr_thumb(), ARM_F_C, ARM_F_N, ARM_F_V, ARM_F_Z, ARM_FLAG_T, ARM_LR, ARM_PC, cpu::byte_order, CACHE_INSTRUCTION, cpu::cd, arm_cpu::cpsr, cpu_functioncall_trace_return(), cpu::cpu_id, debug, EMUL_LITTLE_ENDIAN, fatal(), arm_cpu::flags, get_symbol_name(), if(), machine::instruction_trace, cpu::machine, cpu::mem, MEM_READ, cpu::memory_rw, machine::ncpus, cpu::ninstrs, cpu::pc, arm_cpu::r, cpu::running, machine::show_trace_tree, machine::symbol_context, and t.
void arm_exception | ( | struct cpu * | , |
int | |||
) |
Definition at line 608 of file cpu_arm.cc.
References cpu::arm, ARM_EXCEPTION_DATA_ABT, ARM_EXCEPTION_FIQ, ARM_EXCEPTION_IRQ, ARM_EXCEPTION_PREF_ABT, ARM_EXCEPTION_RESET, ARM_EXCEPTION_SWI, ARM_EXCEPTION_UND, ARM_FLAG_T, arm_save_register_bank(), cpu::cd, arm_cpu::cpsr, debug, arm_cpu::far, fatal(), arm_cpu::flags, arm_cpu::fsr, N_ARM_EXCEPTIONS, cpu::pc, quiet_mode, and cpu::running.
void arm_invalidate_code_translation | ( | struct cpu * | cpu, |
uint64_t | , | ||
int | |||
) |
void arm_invalidate_translation_caches | ( | struct cpu * | cpu, |
uint64_t | , | ||
int | |||
) |
void arm_load_register_bank | ( | struct cpu * | cpu | ) |
Definition at line 561 of file cpu_arm.cc.
References arm_cpu::abt_r13_r14, cpu::arm, ARM_FLAG_MODE, ARM_MODE_ABT32, ARM_MODE_FIQ32, ARM_MODE_IRQ32, ARM_MODE_SVC32, ARM_MODE_SYS32, ARM_MODE_UND32, ARM_MODE_USR32, cpu::cd, arm_cpu::cpsr, arm_cpu::default_r8_r14, fatal(), arm_cpu::fiq_r8_r14, arm_cpu::irq_r13_r14, arm_cpu::r, arm_cpu::svc_r13_r14, and arm_cpu::und_r13_r14.
int arm_memory_rw | ( | struct cpu * | cpu, |
struct memory * | mem, | ||
uint64_t | vaddr, | ||
unsigned char * | data, | ||
size_t | len, | ||
int | writeflag, | ||
int | cache_flags | ||
) |
void arm_pop | ( | struct cpu * | cpu, |
uint32_t * | np, | ||
int | p_bit, | ||
int | u_bit, | ||
int | s_bit, | ||
int | w_bit, | ||
uint32_t | iw | ||
) |
Definition at line 1352 of file cpu_arm_instr.cc.
References addr, cpu::arm, ARM_FLAG_MODE, arm_load_register_bank(), ARM_MODE_ABT32, ARM_MODE_FIQ32, ARM_MODE_IRQ32, ARM_MODE_SVC32, ARM_MODE_SYS32, ARM_MODE_UND32, ARM_MODE_USR32, ARM_PC, arm_save_register_bank(), cpu::byte_order, CACHE_DATA, cpu::cd, arm_cpu::cpsr, cpu_functioncall_trace_return(), data, arm_cpu::default_r8_r14, EMUL_BIG_ENDIAN, EMUL_LITTLE_ENDIAN, fatal(), arm_cpu::flags, cpu::machine, cpu::mem, MEM_READ, cpu::memory_rw, page, cpu::pc, arm_cpu::r, machine::show_trace_tree, arm_cpu::spsr_abt, arm_cpu::spsr_fiq, arm_cpu::spsr_irq, arm_cpu::spsr_svc, and arm_cpu::spsr_und.
Referenced by X().
void arm_push | ( | struct cpu * | cpu, |
uint32_t * | np, | ||
int | p_bit, | ||
int | u_bit, | ||
int | s_bit, | ||
int | w_bit, | ||
uint16_t | regs | ||
) |
Definition at line 1518 of file cpu_arm_instr.cc.
References addr, cpu::arm, ARM_FLAG_MODE, ARM_MODE_ABT32, ARM_MODE_FIQ32, ARM_MODE_IRQ32, ARM_MODE_SVC32, ARM_MODE_SYS32, ARM_MODE_UND32, ARM_MODE_USR32, ARM_PC, cpu::byte_order, CACHE_DATA, cpu::cd, arm_cpu::cpsr, data, arm_cpu::default_r8_r14, EMUL_BIG_ENDIAN, EMUL_LITTLE_ENDIAN, cpu::mem, MEM_WRITE, cpu::memory_rw, page, cpu::pc, and arm_cpu::r.
Referenced by Y().
int arm_run_instr | ( | struct cpu * | cpu | ) |
void arm_save_register_bank | ( | struct cpu * | cpu | ) |
Definition at line 514 of file cpu_arm.cc.
References arm_cpu::abt_r13_r14, cpu::arm, ARM_FLAG_MODE, ARM_MODE_ABT32, ARM_MODE_FIQ32, ARM_MODE_IRQ32, ARM_MODE_SVC32, ARM_MODE_SYS32, ARM_MODE_UND32, ARM_MODE_USR32, cpu::cd, arm_cpu::cpsr, arm_cpu::default_r8_r14, fatal(), arm_cpu::fiq_r8_r14, arm_cpu::irq_r13_r14, arm_cpu::r, arm_cpu::svc_r13_r14, and arm_cpu::und_r13_r14.
Referenced by A__NAME(), arm_exception(), arm_pop(), and Y().
void arm_setup_initial_translation_table | ( | struct cpu * | cpu, |
uint32_t | ttb_addr | ||
) |
Definition at line 220 of file cpu_arm.cc.
References addr, cpu::arm, ARM_CONTROL_MMU, arm_translate_v2p_mmu(), cpu::byte_order, cpu::cd, arm_cpu::control, arm_cpu::dacr, EMUL_LITTLE_ENDIAN, cpu::mem, MEM_WRITE, cpu::memory_rw, NO_EXCEPTIONS, PHYSICAL, cpu::translate_v2p, and arm_cpu::ttb.
Referenced by MACHINE_SETUP().
int arm_translate_v2p | ( | struct cpu * | cpu, |
uint64_t | vaddr, | ||
uint64_t * | return_addr, | ||
int | flags | ||
) |
Definition at line 54 of file memory_arm.cc.
Referenced by arm_coproc_15().
int arm_translate_v2p_mmu | ( | struct cpu * | cpu, |
uint64_t | vaddr, | ||
uint64_t * | return_addr, | ||
int | flags | ||
) |
Definition at line 114 of file memory_arm.cc.
References addr, cpu::arm, ARM_FLAG_MODE, ARM_MODE_USR32, ARM_XSCALE, cpu::byte_order, cpu::cd, arm_cpu::cpsr, arm_cpu::cpu_type, arm_cpu::dacr, EMUL_BIG_ENDIAN, EMUL_LITTLE_ENDIAN, FAULT_DOMAIN_P, FAULT_TRANS_P, FAULT_TRANS_S, FLAG_INSTR, FLAG_NOEXCEPTIONS, FLAG_WRITEFLAG, arm_cpu_type_def::flags, instr, arm_cpu::last_ttb, cpu::mem, memory_paddr_to_hostaddr(), MEMORY_USER_ACCESS, arm_cpu::translation_table, and arm_cpu::ttb.
Referenced by arm_coproc_15(), and arm_setup_initial_translation_table().
void arm_translation_table_set_l1 | ( | struct cpu * | cpu, |
uint32_t | vaddr, | ||
uint32_t | paddr | ||
) |
Definition at line 256 of file cpu_arm.cc.
References addr, cpu::arm, cpu::byte_order, cpu::cd, EMUL_LITTLE_ENDIAN, cpu::mem, MEM_WRITE, cpu::memory_rw, NO_EXCEPTIONS, PHYSICAL, and arm_cpu::ttb.
Referenced by MACHINE_SETUP().
void arm_translation_table_set_l1_b | ( | struct cpu * | cpu, |
uint32_t | vaddr, | ||
uint32_t | paddr | ||
) |
Definition at line 284 of file cpu_arm.cc.
References addr, cpu::arm, cpu::byte_order, cpu::cd, EMUL_LITTLE_ENDIAN, cpu::mem, MEM_WRITE, cpu::memory_rw, NO_EXCEPTIONS, PHYSICAL, and arm_cpu::ttb.
Referenced by MACHINE_SETUP().
void arm_update_translation_table | ( | struct cpu * | cpu, |
uint64_t | vaddr_page, | ||
unsigned char * | host_page, | ||
int | writeflag, | ||
uint64_t | paddr_page | ||
) |