dev_ohci.cc Source File
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dev_ohci.cc
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/*
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* Copyright (C) 2004-2009 Anders Gavare. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*
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* COMMENT: USB Open Host Controller Interface
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*
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* TODO
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include "
cpu.h
"
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#include "
device.h
"
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#include "
interrupt.h
"
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#include "
machine.h
"
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#include "
memory.h
"
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#include "
misc.h
"
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#include "
thirdparty/ohcireg.h
"
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/* Length is 0x1000 at least on Playstation 2 */
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#define DEV_OHCI_LENGTH 0x1000
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#define debug fatal
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struct
ohci_data
{
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struct
interrupt
irq
;
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int
port1reset
;
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};
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DEVICE_ACCESS
(ohci)
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{
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struct
ohci_data
*d = (
struct
ohci_data
*) extra;
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uint64_t idata = 0, odata = 0;
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const
char
*name = NULL;
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if
(writeflag ==
MEM_WRITE
)
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idata =
memory_readmax64
(
cpu
,
data
, len);
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switch
(relative_addr) {
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case
OHCI_REVISION
:
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name =
"REVISION"
;
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if
(writeflag ==
MEM_READ
) {
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odata = 0x10;
/* Version 1.0. */
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}
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break
;
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case
OHCI_COMMAND_STATUS
:
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name =
"COMMAND_STATUS"
;
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if
(idata == 0x2) {
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fatal
(
"Hm... OHCI COMMAND STATUS\n"
);
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INTERRUPT_ASSERT
(d->
irq
);
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}
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break
;
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case
OHCI_INTERRUPT_STATUS
:
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name =
"INTERRUPT_STATUS"
;
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odata =
OHCI_WDH
;
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break
;
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/*
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* TODO: It now sleeps at tsleep(xfer, PRIBIO, "usbsyn", 0);
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* in netbsd/src/sys/dev/usb/usbdi.c
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*/
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case
OHCI_RH_DESCRIPTOR_A
:
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name =
"RH_DESCRIPTOR_A"
;
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odata = 2;
/* Nr of ports */
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break
;
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case
OHCI_RH_STATUS
:
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name =
"RH_STATUS"
;
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/* TODO */
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break
;
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case
OHCI_RH_PORT_STATUS
(1):
/* First port */
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name =
"RH_PORT_STATUS(1)"
;
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if
(writeflag ==
MEM_READ
) {
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/* Status = low 16, Change = top 16 */
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odata = 0x10101;
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/* 0x0001 = connected
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0x0100 = power */
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if
(d->
port1reset
)
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odata |= (0x10 << 16) | 0x10;
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}
else
{
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/* 0x10 = UPS_C_PORT_RESET */
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if
(idata & 0x10)
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d->
port1reset
= 1;
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if
(idata & 0x100000)
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d->
port1reset
= 0;
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}
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break
;
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case
OHCI_RH_PORT_STATUS
(2):
/* Second port */
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name =
"RH_PORT_STATUS(2)"
;
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/* TODO */
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odata = 0;
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break
;
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default
:
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if
(writeflag ==
MEM_READ
) {
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debug
(
"[ ohci: read from addr 0x%x: 0x%llx ]\n"
,
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(
int
)relative_addr, (
long
long
)odata);
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}
else
{
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debug
(
"[ ohci: write to addr 0x%x: 0x%llx ]\n"
,
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(
int
)relative_addr, (
long
long
)idata);
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}
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}
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if
(name != NULL) {
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if
(writeflag ==
MEM_READ
)
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debug
(
"[ ohci: read from %s: 0x%llx ]\n"
,
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name, (
long
long
)odata);
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else
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debug
(
"[ ohci: write to %s: 0x%llx ]\n"
,
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name, (
long
long
)idata);
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}
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if
(writeflag ==
MEM_READ
)
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memory_writemax64
(
cpu
,
data
, len, odata);
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return
1;
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}
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DEVINIT
(ohci)
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{
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struct
ohci_data
*d;
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CHECK_ALLOCATION
(d = (
struct
ohci_data
*) malloc(
sizeof
(
struct
ohci_data
)));
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memset(d, 0,
sizeof
(
struct
ohci_data
));
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INTERRUPT_CONNECT
(
devinit
->
interrupt_path
, d->
irq
);
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memory_device_register
(
devinit
->
machine
->
memory
,
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devinit
->
name
,
devinit
->
addr
,
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DEV_OHCI_LENGTH
, dev_ohci_access, d,
DM_DEFAULT
, NULL);
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return
1;
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}
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data
u_short data
Definition:
siireg.h:79
DEV_OHCI_LENGTH
#define DEV_OHCI_LENGTH
Definition:
dev_ohci.cc:48
OHCI_RH_DESCRIPTOR_A
#define OHCI_RH_DESCRIPTOR_A
Definition:
ohcireg.h:108
INTERRUPT_CONNECT
#define INTERRUPT_CONNECT(name, istruct)
Definition:
interrupt.h:77
INTERRUPT_ASSERT
#define INTERRUPT_ASSERT(istruct)
Definition:
interrupt.h:74
ohcireg.h
devinit::addr
uint64_t addr
Definition:
device.h:46
memory_device_register
void memory_device_register(struct memory *mem, const char *, uint64_t baseaddr, uint64_t len, int(*f)(struct cpu *, struct memory *, uint64_t, unsigned char *, size_t, int, void *), void *extra, int flags, unsigned char *dyntrans_data)
Definition:
memory.cc:339
MEM_READ
#define MEM_READ
Definition:
memory.h:116
ohci_data::port1reset
int port1reset
Definition:
dev_ohci.cc:57
DM_DEFAULT
#define DM_DEFAULT
Definition:
memory.h:130
devinit::machine
struct machine * machine
Definition:
device.h:41
DEVICE_ACCESS
DEVICE_ACCESS(ohci)
Definition:
dev_ohci.cc:61
device.h
MEM_WRITE
#define MEM_WRITE
Definition:
memory.h:117
devinit::interrupt_path
char * interrupt_path
Definition:
device.h:50
interrupt.h
fatal
void fatal(const char *fmt,...)
Definition:
main.cc:152
OHCI_WDH
#define OHCI_WDH
Definition:
ohcireg.h:83
misc.h
memory_readmax64
uint64_t memory_readmax64(struct cpu *cpu, unsigned char *buf, int len)
Definition:
memory.cc:55
machine.h
devinit::name
char * name
Definition:
device.h:43
devinit
Definition:
device.h:40
OHCI_INTERRUPT_STATUS
#define OHCI_INTERRUPT_STATUS
Definition:
ohcireg.h:81
cpu.h
machine::memory
struct memory * memory
Definition:
machine.h:126
OHCI_RH_PORT_STATUS
#define OHCI_RH_PORT_STATUS(n)
Definition:
ohcireg.h:124
OHCI_REVISION
#define OHCI_REVISION
Definition:
ohcireg.h:52
debug
#define debug
Definition:
dev_ohci.cc:51
OHCI_RH_STATUS
#define OHCI_RH_STATUS
Definition:
ohcireg.h:117
interrupt
Definition:
interrupt.h:36
memory_writemax64
void memory_writemax64(struct cpu *cpu, unsigned char *buf, int len, uint64_t data)
Definition:
memory.cc:89
cpu
Definition:
cpu.h:326
ohci_data::irq
struct interrupt irq
Definition:
dev_ohci.cc:55
OHCI_COMMAND_STATUS
#define OHCI_COMMAND_STATUS
Definition:
ohcireg.h:75
DEVINIT
DEVINIT(ohci)
Definition:
dev_ohci.cc:148
memory.h
ohci_data
Definition:
dev_ohci.cc:54
CHECK_ALLOCATION
#define CHECK_ALLOCATION(ptr)
Definition:
misc.h:239
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