cpu_ppc.h File Reference

Back to the index.

Classes | Macros | Functions
cpu_ppc.h File Reference
#include "misc.h"

Go to the source code of this file.

Classes

struct  ppc_cpu_type_def
 
struct  ppc_cpu
 

Macros

#define MODE_PPC   0
 
#define MODE_POWER   1
 
#define PPC_NOFP   1
 
#define PPC_601   2
 
#define PPC_603   4
 
#define PPC_NO_DEC   8 /* No DEC (decrementer) SPR */
 
#define PPC_CPU_TYPE_DEFS
 
#define PPC_NGPRS   32
 
#define PPC_NFPRS   32
 
#define PPC_NVRS   32
 
#define PPC_N_TGPRS   4
 
#define PPC_N_IC_ARGS   3
 
#define PPC_INSTR_ALIGNMENT_SHIFT   2
 
#define PPC_IC_ENTRIES_SHIFT   10
 
#define PPC_IC_ENTRIES_PER_PAGE   (1 << PPC_IC_ENTRIES_SHIFT)
 
#define PPC_PC_TO_IC_ENTRY(a)
 
#define PPC_ADDR_TO_PAGENR(a)
 
#define PPC_L2N   17
 
#define PPC_L3N   18
 
#define PPC_MAX_VPH_TLB_ENTRIES   128
 
#define PPC_MSR_SF   (1ULL << 63) /* Sixty-Four-Bit Mode */
 
#define PPC_MSR_HV   (1ULL << 60) /* Hypervisor */
 
#define PPC_MSR_VEC   (1 << 25) /* Altivec Enable */
 
#define PPC_MSR_TGPR   (1 << 17) /* Temporary gpr0..3 */
 
#define PPC_MSR_ILE   (1 << 16) /* Interrupt Little-Endian Mode */
 
#define PPC_MSR_EE   (1 << 15) /* External Interrupt Enable */
 
#define PPC_MSR_PR   (1 << 14) /* Problem/Privilege State */
 
#define PPC_MSR_FP   (1 << 13) /* Floating-Point Available */
 
#define PPC_MSR_ME   (1 << 12) /* Machine Check Interrupt Enable */
 
#define PPC_MSR_FE0   (1 << 11) /* Floating-Point Exception Mode 0 */
 
#define PPC_MSR_SE   (1 << 10) /* Single-Step Trace Enable */
 
#define PPC_MSR_BE   (1 << 9) /* Branch Trace Enable */
 
#define PPC_MSR_FE1   (1 << 8) /* Floating-Point Exception Mode 1 */
 
#define PPC_MSR_IP   (1 << 6) /* Vector Table at 0xfff00000 */
 
#define PPC_MSR_IR   (1 << 5) /* Instruction Relocate */
 
#define PPC_MSR_DR   (1 << 4) /* Data Relocate */
 
#define PPC_MSR_PMM   (1 << 2) /* Performance Monitor Mark */
 
#define PPC_MSR_RI   (1 << 1) /* Recoverable Interrupt */
 
#define PPC_MSR_LE   (1) /* Little-Endian Mode */
 
#define PPC_FPSCR_FX   (1 << 31) /* Exception summary */
 
#define PPC_FPSCR_FEX   (1 << 30) /* Enabled Exception summary */
 
#define PPC_FPSCR_VX   (1 << 29) /* Invalid Operation summary */
 
#define PPC_FPSCR_VXNAN   (1 << 24)
 
#define PPC_FPSCR_FPCC   0x0000f000
 
#define PPC_FPSCR_FPCC_SHIFT   12
 
#define PPC_FPSCR_FL   (1 << 15) /* Less than */
 
#define PPC_FPSCR_FG   (1 << 14) /* Greater than */
 
#define PPC_FPSCR_FE   (1 << 13) /* Equal or Zero */
 
#define PPC_FPSCR_FU   (1 << 12) /* Unordered or NaN */
 
#define PPC_EXCEPTION_DSI   0x3 /* Data Storage Interrupt */
 
#define PPC_EXCEPTION_ISI   0x4 /* Instruction Storage Interrupt */
 
#define PPC_EXCEPTION_EI   0x5 /* External interrupt */
 
#define PPC_EXCEPTION_FPU   0x8 /* Floating-Point unavailable */
 
#define PPC_EXCEPTION_DEC   0x9 /* Decrementer */
 
#define PPC_EXCEPTION_SC   0xc /* Syscall */
 
#define PPC_XER_SO   (1UL << 31) /* Summary Overflow */
 
#define PPC_XER_OV   (1 << 30) /* Overflow */
 
#define PPC_XER_CA   (1 << 29) /* Carry */
 

Functions

int ppc_run_instr (struct cpu *cpu)
 
int ppc32_run_instr (struct cpu *cpu)
 
void ppc_exception (struct cpu *cpu, int exception_nr)
 
void ppc_update_translation_table (struct cpu *cpu, uint64_t vaddr_page, unsigned char *host_page, int writeflag, uint64_t paddr_page)
 
void ppc32_update_translation_table (struct cpu *cpu, uint64_t vaddr_page, unsigned char *host_page, int writeflag, uint64_t paddr_page)
 
void ppc_invalidate_translation_caches (struct cpu *cpu, uint64_t, int)
 
void ppc32_invalidate_translation_caches (struct cpu *cpu, uint64_t, int)
 
void ppc_invalidate_code_translation (struct cpu *cpu, uint64_t, int)
 
void ppc32_invalidate_code_translation (struct cpu *cpu, uint64_t, int)
 
void ppc_init_64bit_dummy_tables (struct cpu *cpu)
 
int ppc_memory_rw (struct cpu *cpu, struct memory *mem, uint64_t vaddr, unsigned char *data, size_t len, int writeflag, int cache_flags)
 
int ppc_cpu_family_init (struct cpu_family *)
 
int ppc_translate_v2p (struct cpu *cpu, uint64_t vaddr, uint64_t *return_addr, int flags)
 

Macro Definition Documentation

◆ MODE_POWER

#define MODE_POWER   1

Definition at line 41 of file cpu_ppc.h.

◆ MODE_PPC

#define MODE_PPC   0

Definition at line 40 of file cpu_ppc.h.

◆ PPC_601

#define PPC_601   2

Definition at line 65 of file cpu_ppc.h.

◆ PPC_603

#define PPC_603   4

Definition at line 66 of file cpu_ppc.h.

◆ PPC_ADDR_TO_PAGENR

#define PPC_ADDR_TO_PAGENR (   a)
Value:

Definition at line 99 of file cpu_ppc.h.

◆ PPC_CPU_TYPE_DEFS

#define PPC_CPU_TYPE_DEFS
Value:
{ \
{ "PPC405GP", 0x40110000, 32, PPC_NOFP|PPC_NO_DEC, \
13,5,2, 13,5,2, 0,5,1, 0 }, \
{ "PPC601", 0, 32, PPC_601, 14,5,4, 14,5,4, 0,0,0, 0 },\
{ "PPC603", 0x00030302, 32, PPC_603, 14,5,4, 14,5,4, 0,0,0, 0 },\
{ "PPC603e", 0x00060104, 32, PPC_603, 14,5,4, 14,5,4, 0,0,0, 0 },\
{ "PPC604", 0x00040304, 32, 0, 15,5,4, 15,5,4, 0,0,0, 0 }, \
{ "PPC620", 0x00140000, 64, 0, 15,5,4, 15,5,4, 0,0,0, 0 }, \
{ "MPC7400", 0x000c0000, 32, 0, 15,5,2, 15,5,2, 19,5,1, 1 }, \
{ "PPC750", 0x00084202, 32, 0, 15,5,2, 15,5,2, 20,5,1, 0 }, \
{ "G4e", 0, 32, 0, 15,5,8, 15,5,8, 18,5,8, 1 }, \
{ "PPC970", 0x00390000, 64, 0, 16,7,1, 15,7,2, 19,7,1, 1 }, \
{ NULL, 0, 0,0,0,0,0,0,0,0,0,0,0,0 } \
}

Definition at line 73 of file cpu_ppc.h.

◆ PPC_EXCEPTION_DEC

#define PPC_EXCEPTION_DEC   0x9 /* Decrementer */

Definition at line 194 of file cpu_ppc.h.

◆ PPC_EXCEPTION_DSI

#define PPC_EXCEPTION_DSI   0x3 /* Data Storage Interrupt */

Definition at line 190 of file cpu_ppc.h.

◆ PPC_EXCEPTION_EI

#define PPC_EXCEPTION_EI   0x5 /* External interrupt */

Definition at line 192 of file cpu_ppc.h.

◆ PPC_EXCEPTION_FPU

#define PPC_EXCEPTION_FPU   0x8 /* Floating-Point unavailable */

Definition at line 193 of file cpu_ppc.h.

◆ PPC_EXCEPTION_ISI

#define PPC_EXCEPTION_ISI   0x4 /* Instruction Storage Interrupt */

Definition at line 191 of file cpu_ppc.h.

◆ PPC_EXCEPTION_SC

#define PPC_EXCEPTION_SC   0xc /* Syscall */

Definition at line 195 of file cpu_ppc.h.

◆ PPC_FPSCR_FE

#define PPC_FPSCR_FE   (1 << 13) /* Equal or Zero */

Definition at line 186 of file cpu_ppc.h.

◆ PPC_FPSCR_FEX

#define PPC_FPSCR_FEX   (1 << 30) /* Enabled Exception summary */

Definition at line 177 of file cpu_ppc.h.

◆ PPC_FPSCR_FG

#define PPC_FPSCR_FG   (1 << 14) /* Greater than */

Definition at line 185 of file cpu_ppc.h.

◆ PPC_FPSCR_FL

#define PPC_FPSCR_FL   (1 << 15) /* Less than */

Definition at line 184 of file cpu_ppc.h.

◆ PPC_FPSCR_FPCC

#define PPC_FPSCR_FPCC   0x0000f000

Definition at line 182 of file cpu_ppc.h.

◆ PPC_FPSCR_FPCC_SHIFT

#define PPC_FPSCR_FPCC_SHIFT   12

Definition at line 183 of file cpu_ppc.h.

◆ PPC_FPSCR_FU

#define PPC_FPSCR_FU   (1 << 12) /* Unordered or NaN */

Definition at line 187 of file cpu_ppc.h.

◆ PPC_FPSCR_FX

#define PPC_FPSCR_FX   (1 << 31) /* Exception summary */

Definition at line 176 of file cpu_ppc.h.

◆ PPC_FPSCR_VX

#define PPC_FPSCR_VX   (1 << 29) /* Invalid Operation summary */

Definition at line 178 of file cpu_ppc.h.

◆ PPC_FPSCR_VXNAN

#define PPC_FPSCR_VXNAN   (1 << 24)

Definition at line 180 of file cpu_ppc.h.

◆ PPC_IC_ENTRIES_PER_PAGE

#define PPC_IC_ENTRIES_PER_PAGE   (1 << PPC_IC_ENTRIES_SHIFT)

Definition at line 96 of file cpu_ppc.h.

◆ PPC_IC_ENTRIES_SHIFT

#define PPC_IC_ENTRIES_SHIFT   10

Definition at line 95 of file cpu_ppc.h.

◆ PPC_INSTR_ALIGNMENT_SHIFT

#define PPC_INSTR_ALIGNMENT_SHIFT   2

Definition at line 94 of file cpu_ppc.h.

◆ PPC_L2N

#define PPC_L2N   17

Definition at line 102 of file cpu_ppc.h.

◆ PPC_L3N

#define PPC_L3N   18

Definition at line 103 of file cpu_ppc.h.

◆ PPC_MAX_VPH_TLB_ENTRIES

#define PPC_MAX_VPH_TLB_ENTRIES   128

Definition at line 108 of file cpu_ppc.h.

◆ PPC_MSR_BE

#define PPC_MSR_BE   (1 << 9) /* Branch Trace Enable */

Definition at line 166 of file cpu_ppc.h.

◆ PPC_MSR_DR

#define PPC_MSR_DR   (1 << 4) /* Data Relocate */

Definition at line 170 of file cpu_ppc.h.

◆ PPC_MSR_EE

#define PPC_MSR_EE   (1 << 15) /* External Interrupt Enable */

Definition at line 160 of file cpu_ppc.h.

◆ PPC_MSR_FE0

#define PPC_MSR_FE0   (1 << 11) /* Floating-Point Exception Mode 0 */

Definition at line 164 of file cpu_ppc.h.

◆ PPC_MSR_FE1

#define PPC_MSR_FE1   (1 << 8) /* Floating-Point Exception Mode 1 */

Definition at line 167 of file cpu_ppc.h.

◆ PPC_MSR_FP

#define PPC_MSR_FP   (1 << 13) /* Floating-Point Available */

Definition at line 162 of file cpu_ppc.h.

◆ PPC_MSR_HV

#define PPC_MSR_HV   (1ULL << 60) /* Hypervisor */

Definition at line 155 of file cpu_ppc.h.

◆ PPC_MSR_ILE

#define PPC_MSR_ILE   (1 << 16) /* Interrupt Little-Endian Mode */

Definition at line 159 of file cpu_ppc.h.

◆ PPC_MSR_IP

#define PPC_MSR_IP   (1 << 6) /* Vector Table at 0xfff00000 */

Definition at line 168 of file cpu_ppc.h.

◆ PPC_MSR_IR

#define PPC_MSR_IR   (1 << 5) /* Instruction Relocate */

Definition at line 169 of file cpu_ppc.h.

◆ PPC_MSR_LE

#define PPC_MSR_LE   (1) /* Little-Endian Mode */

Definition at line 173 of file cpu_ppc.h.

◆ PPC_MSR_ME

#define PPC_MSR_ME   (1 << 12) /* Machine Check Interrupt Enable */

Definition at line 163 of file cpu_ppc.h.

◆ PPC_MSR_PMM

#define PPC_MSR_PMM   (1 << 2) /* Performance Monitor Mark */

Definition at line 171 of file cpu_ppc.h.

◆ PPC_MSR_PR

#define PPC_MSR_PR   (1 << 14) /* Problem/Privilege State */

Definition at line 161 of file cpu_ppc.h.

◆ PPC_MSR_RI

#define PPC_MSR_RI   (1 << 1) /* Recoverable Interrupt */

Definition at line 172 of file cpu_ppc.h.

◆ PPC_MSR_SE

#define PPC_MSR_SE   (1 << 10) /* Single-Step Trace Enable */

Definition at line 165 of file cpu_ppc.h.

◆ PPC_MSR_SF

#define PPC_MSR_SF   (1ULL << 63) /* Sixty-Four-Bit Mode */

Definition at line 153 of file cpu_ppc.h.

◆ PPC_MSR_TGPR

#define PPC_MSR_TGPR   (1 << 17) /* Temporary gpr0..3 */

Definition at line 158 of file cpu_ppc.h.

◆ PPC_MSR_VEC

#define PPC_MSR_VEC   (1 << 25) /* Altivec Enable */

Definition at line 157 of file cpu_ppc.h.

◆ PPC_N_IC_ARGS

#define PPC_N_IC_ARGS   3

Definition at line 93 of file cpu_ppc.h.

◆ PPC_N_TGPRS

#define PPC_N_TGPRS   4

Definition at line 91 of file cpu_ppc.h.

◆ PPC_NFPRS

#define PPC_NFPRS   32

Definition at line 89 of file cpu_ppc.h.

◆ PPC_NGPRS

#define PPC_NGPRS   32

Definition at line 88 of file cpu_ppc.h.

◆ PPC_NO_DEC

#define PPC_NO_DEC   8 /* No DEC (decrementer) SPR */

Definition at line 67 of file cpu_ppc.h.

◆ PPC_NOFP

#define PPC_NOFP   1

Definition at line 64 of file cpu_ppc.h.

◆ PPC_NVRS

#define PPC_NVRS   32

Definition at line 90 of file cpu_ppc.h.

◆ PPC_PC_TO_IC_ENTRY

#define PPC_PC_TO_IC_ENTRY (   a)
Value:

Definition at line 97 of file cpu_ppc.h.

◆ PPC_XER_CA

#define PPC_XER_CA   (1 << 29) /* Carry */

Definition at line 200 of file cpu_ppc.h.

◆ PPC_XER_OV

#define PPC_XER_OV   (1 << 30) /* Overflow */

Definition at line 199 of file cpu_ppc.h.

◆ PPC_XER_SO

#define PPC_XER_SO   (1UL << 31) /* Summary Overflow */

Definition at line 198 of file cpu_ppc.h.

Function Documentation

◆ ppc32_invalidate_code_translation()

void ppc32_invalidate_code_translation ( struct cpu cpu,
uint64_t  ,
int   
)

◆ ppc32_invalidate_translation_caches()

void ppc32_invalidate_translation_caches ( struct cpu cpu,
uint64_t  ,
int   
)

◆ ppc32_run_instr()

int ppc32_run_instr ( struct cpu cpu)

◆ ppc32_update_translation_table()

void ppc32_update_translation_table ( struct cpu cpu,
uint64_t  vaddr_page,
unsigned char *  host_page,
int  writeflag,
uint64_t  paddr_page 
)

◆ ppc_cpu_family_init()

int ppc_cpu_family_init ( struct cpu_family )

◆ ppc_exception()

void ppc_exception ( struct cpu cpu,
int  exception_nr 
)

◆ ppc_init_64bit_dummy_tables()

void ppc_init_64bit_dummy_tables ( struct cpu cpu)

◆ ppc_invalidate_code_translation()

void ppc_invalidate_code_translation ( struct cpu cpu,
uint64_t  ,
int   
)

◆ ppc_invalidate_translation_caches()

void ppc_invalidate_translation_caches ( struct cpu cpu,
uint64_t  ,
int   
)

◆ ppc_memory_rw()

int ppc_memory_rw ( struct cpu cpu,
struct memory mem,
uint64_t  vaddr,
unsigned char *  data,
size_t  len,
int  writeflag,
int  cache_flags 
)

◆ ppc_run_instr()

int ppc_run_instr ( struct cpu cpu)

◆ ppc_translate_v2p()

int ppc_translate_v2p ( struct cpu cpu,
uint64_t  vaddr,
uint64_t *  return_addr,
int  flags 
)

◆ ppc_update_translation_table()

void ppc_update_translation_table ( struct cpu cpu,
uint64_t  vaddr_page,
unsigned char *  host_page,
int  writeflag,
uint64_t  paddr_page 
)
PPC_NOFP
#define PPC_NOFP
Definition: cpu_ppc.h:63
PPC_NO_DEC
#define PPC_NO_DEC
Definition: cpu_ppc.h:66
PPC_603
#define PPC_603
Definition: cpu_ppc.h:65
PPC_601
#define PPC_601
Definition: cpu_ppc.h:64
PPC_IC_ENTRIES_SHIFT
#define PPC_IC_ENTRIES_SHIFT
Definition: cpu_ppc.h:94
PPC_IC_ENTRIES_PER_PAGE
#define PPC_IC_ENTRIES_PER_PAGE
Definition: cpu_ppc.h:95
PPC_INSTR_ALIGNMENT_SHIFT
#define PPC_INSTR_ALIGNMENT_SHIFT
Definition: cpu_ppc.h:93

Generated on Tue Aug 25 2020 19:25:06 for GXemul by doxygen 1.8.18